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標題: CC1101 MSP430收發程序 [打印本頁]

作者: shawnmk7    時間: 2018-12-5 18:13
標題: CC1101 MSP430收發程序
  1. #include "msp430g2452.h"
  2. #include "common.h"
  3. #include "regssrf04.h"
  4. #include "initial_spi.h"
  5. #include "Uart9600.h"
  6. #define CRC_OK              0x80  
  7. #define RSSI                0
  8. #define LQI                 1
  9. #define BYTES_IN_RXFIFO     0x7F   

  10. #define sys_in     P2OUT|=BIT3;
  11. #define com_on     P2OUT|=BIT4;
  12. #define com_off    P2OUT&=~BIT4;
  13. #define sys_0ff    P2OUT&=~BIT3;

  14. BYTE rxBuffer[61];
  15. BYTE txBuffer[10]={0x80,0x00,0x00,0x00,0x00,0x90,0x00,0x50,0x50,0x50};
  16. void halRfWriteRfSettings(/*const RF_SETTINGS *pRfSettings*/);
  17. void halRfSendPacket(BYTE *txBuffer, UINT8 size) ;
  18. void interrupt_initial();
  19. void delay_tx();
  20. unsigned char tx_ready=0;
  21. unsigned char length;
  22. unsigned char count=0;
  23. void systime_initial(void)
  24. {
  25. WDTCTL = WDTPW + WDTHOLD;                 // Stop watchdog timer
  26. DCOCTL =CALDCO_1MHZ;
  27. BCSCTL1 = CALBC1_1MHZ;
  28. __enable_interrupt();
  29. }
  30. void IO_initial(void)
  31. {
  32. //********************************************************
  33. //SPI端口初始化
  34. //********************************************************
  35.         SI_OUTPUT ;
  36.         SO_INPUT ;
  37.         CSN_OUTPUT;
  38.         SCLK_OUTPUT;

  39.         P2DIR|=BIT3+BIT4;               //系統,通信指示燈      
  40. //**************************************************************
  41. //串口初始化,模擬的
  42. //******************************************************************
  43.         P1SEL = UART_TXD + UART_RXD;    // 串口,Timer function for TXD/RXD pins
  44.         P1DIR|=UART_TXD;
  45. //******************************************************************
  46. }
  47. //******************************************************************
  48. //***中斷初始化
  49. //*****************************************************************
  50. void halRfWriteRfSettings()
  51. {
  52.     // Write register settings
  53.     SPI_WriteReg(CCxxx0_FSCTRL1,  0x06);// FSCTRL1   Frequency synthesizer control.
  54.     SPI_WriteReg(CCxxx0_FSCTRL0,  0x00);// FSCTRL0   Frequency synthesizer control.
  55.     SPI_WriteReg(CCxxx0_FREQ2,    0x10);// FREQ2     Frequency control word, high byte.
  56.     SPI_WriteReg(CCxxx0_FREQ1,    0xB1);// FREQ1     Frequency control word, middle byte.
  57.     SPI_WriteReg(CCxxx0_FREQ0,    0x3B);// FREQ0     Frequency control word, low byte.
  58.     SPI_WriteReg(CCxxx0_MDMCFG4,  0xF6);// MDMCFG4   Modem configuration.
  59.     SPI_WriteReg(CCxxx0_MDMCFG3,  0x83);// MDMCFG3   Modem configuration.
  60.     SPI_WriteReg(CCxxx0_MDMCFG2,  0x13);// MDMCFG2   Modem configuration.
  61.     SPI_WriteReg(CCxxx0_MDMCFG1,  0x22);// MDMCFG1   Modem configuration.
  62.     SPI_WriteReg(CCxxx0_MDMCFG0,  0xF8);// MDMCFG0   Modem configuration.
  63.     SPI_WriteReg(CCxxx0_CHANNR,   0x00);// CHANNR    Channel number.
  64.     SPI_WriteReg(CCxxx0_DEVIATN,  0x15);// DEVIATN   Modem deviation setting (when FSK modulation is enabled).
  65.     SPI_WriteReg(CCxxx0_FREND1,   0x56);// FREND1    Front end RX configuration.
  66.     SPI_WriteReg(CCxxx0_FREND0,   0x10);// FREND0    Front end TX configuration.
  67.     SPI_WriteReg(CCxxx0_MCSM0 ,   0x18);// MCSM0     Main Radio Control State Machine configuration.
  68.     SPI_WriteReg(CCxxx0_FOCCFG,   0x16);// FOCCFG    Frequency Offset Compensation Configuration.
  69.     SPI_WriteReg(CCxxx0_BSCFG,    0x6C);// BSCFG     Bit synchronization Configuration.
  70.     SPI_WriteReg(CCxxx0_AGCCTRL2, 0x03);// AGCCTRL2  AGC control.
  71.     SPI_WriteReg(CCxxx0_AGCCTRL1, 0x40);// AGCCTRL1  AGC control.
  72.     SPI_WriteReg(CCxxx0_AGCCTRL0, 0x91);// AGCCTRL0  AGC control.
  73.     SPI_WriteReg(CCxxx0_FSCAL3,   0xE9);// FSCAL3    Frequency synthesizer calibration.
  74.     SPI_WriteReg(CCxxx0_FSCAL2,   0x2A);// FSCAL2    Frequency synthesizer calibration.
  75.     SPI_WriteReg(CCxxx0_FSCAL1,   0x00);// FSCAL1    Frequency synthesizer calibration.
  76.     SPI_WriteReg(CCxxx0_FSCAL0,   0x1F);// FSCAL0    Frequency synthesizer calibration.
  77.     SPI_WriteReg(CCxxx0_FSTEST,   0x59);// FSTEST    Frequency synthesizer calibration.
  78.     SPI_WriteReg(CCxxx0_TEST2,    0x81);// TEST2     Various test settings.
  79.     SPI_WriteReg(CCxxx0_TEST1,    0x35);// TEST1     Various test settings.
  80.     SPI_WriteReg(CCxxx0_TEST0,    0x09);// TEST0     Various test settings.
  81.     SPI_WriteReg(CCxxx0_FIFOTHR,  0x47);// FIFOTHR   RXFIFO and TXFIFO thresholds.
  82.     SPI_WriteReg(CCxxx0_IOCFG2,   0x2e);// IOCFG2    GDO2 output pin configuration.
  83.     SPI_WriteReg(CCxxx0_IOCFG0,   0x06);// IOCFG0D   GDO0 output pin configuration.
  84.     SPI_WriteReg(CCxxx0_PKTCTRL1, 0x04);// PKTCTRL1  Packet automation control.
  85.     SPI_WriteReg(CCxxx0_PKTCTRL0, 0x05);// PKTCTRL0  Packet automation control.
  86.     SPI_WriteReg(CCxxx0_ADDR,     0x00);// ADDR      Device address.
  87.     SPI_WriteReg(CCxxx0_PKTLEN,   0xFF);// PKTLEN    Packet length.
  88. }

  89. void interrupt_initial()
  90. {
  91.         WDTCTL = WDT_MDLY_32;                     // Set Watchdog Timer interval to ~30ms
  92.         IE1 |= WDTIE;                             // Enable WDT interrupt
  93. }

  94. #pragma vector=WDT_VECTOR
  95. __interrupt void watchdog_timer(void)
  96. {
  97.         count=count+1;
  98.         if(count>250)
  99.         {
  100.           count=0;
  101.           SPI_Strobe(CCxxx0_SIDLE  );
  102.       halRfSendPacket(txBuffer, 10);
  103.          // com_on;
  104.           __delay_cycles(10000);
  105.           __delay_cycles(10000);
  106.          SPI_Strobe(CCxxx0_SPWD);
  107.          _bis_SR_register(LPM4_bits);
  108.         }
  109. }


  110. BYTE  halRfReceivePacket(BYTE *rxBuffer, UINT8 *length)
  111. {
  112.     BYTE status[2];
  113.     unsigned char packetLength;
  114.     unsigned char  DATE;
  115.     SPI_Strobe(CCxxx0_SRX);
  116.    // Wait for GDO0 to be set -> sync received
  117.      while (!GDO0_PIN);
  118.     // Wait for GDO0 to be cleared -> end of packet
  119.      while (GDO0_PIN);
  120.     DATE=SPI_ReadStatus(CCxxx0_RXBYTES);
  121.     // This status register is safe to read since it will not be updated after
  122.     // the packet has been received (See the CC1100 and 2500 Errata Note)
  123.     if (( DATE& BYTES_IN_RXFIFO))
  124.         {
  125.         // Read length byte
  126.         packetLength = SPI_ReadReg(CCxxx0_RXFIFO);
  127.         // Read data from RX FIFO and store in rxBuffer
  128.         if (packetLength <= *length)
  129.         {
  130.            SPI_ReadBurstReg(CCxxx0_RXFIFO, rxBuffer, packetLength);
  131.            *length = packetLength;
  132.             // Read the 2 appended status bytes (status[0] = RSSI, status[1] = LQI)
  133.            SPI_ReadBurstReg(CCxxx0_RXFIFO, status, 2);
  134.             // MSB of LQI is the CRC_OK bit
  135.            return (status[LQI] & CRC_OK);

  136.         }
  137.         else
  138.         {
  139.             *length = packetLength;
  140.             // Make sure that the radio is in IDLE state before flushing the FIFO
  141.             // (Unless RXOFF_MODE has been changed, the radio should be in IDLE state at this point)
  142.             SPI_Strobe(CCxxx0_SIDLE);
  143.             // Flush RX FIFO
  144.             SPI_Strobe(CCxxx0_SFRX);
  145.             return FALSE;
  146.          
  147.         }
  148.     }
  149.     else
  150.     {
  151.         return FALSE;
  152.         
  153.     }
  154.    
  155. }// halRfReceivePacket

  156. void halRfSendPacket(BYTE *txBuffer, UINT8 size)
  157. {
  158.         SPI_WriteReg(CCxxx0_TXFIFO ,size);
  159.         SPI_WriteBurstReg(CCxxx0_TXFIFO, txBuffer, size);
  160.         SPI_Strobe(CCxxx0_STX);
  161.     // Wait for GDO0 to be set -> sync received
  162.     while (!GDO0_PIN);
  163.     // Wait for GDO0 to be cleared -> end of packet
  164.     while (GDO0_PIN);
  165.     SPI_Strobe(CCxxx0_SFTX);
  166. }


  167. void main(void)
  168. {
  169. //unsigned char m;
  170. systime_initial();
  171. IO_initial();
  172. interrupt_initial();
  173. TimerA_UART_init();
  174. SPI_Strobe(CCxxx0_SRES);
  175. halRfWriteRfSettings(/*&rfSettings*/ );
  176.   __delay_cycles(10000);
  177. sys_0ff;                            //系統啟動指示燈亮
  178. while(1)
  179. {
  180.          com_off;
  181. }
  182. }
復制代碼

全部資料51hei下載地址:
CC1101_TX.zip (37.68 KB, 下載次數: 16)


作者: pm1981    時間: 2019-3-6 10:58
聽所長時間接收會死機




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